How to use MiniIDE and SIMHC12?

It's simply used by 'help' menu.These steps here are only for simulations.

You have to read my module before you proceed to the next steps.


MiniIDE

1.   Open MGTEK MiniIDE. Click on 'File' and 'New'.Write your program with assembly language here. You must start with tab once. Your program should begin with 'org' which is the locations of your instructions will be stored.

 2.     After finished typing your program, save your file with extension of *.asm.

3. Go to menu ‘Build’-click on ‘Set Project File’.

 4. Again, ‘Build’ menu and click ‘Build’ the file.

This 'Build' is actually an assembler. It will automatically generate list file and machine language with *.lst file and *.s19 file correspondingly. You can see the file it is generated inside the file you save your program.

Click on file with extension of *.lst and *.s19 file. s19 file is a machine code that is already translated by the assembler.

********************************lst file********************************************
:\ECE 365 microprocessor systems\NEW\microC\SIMULATOR\SIMULATOR\ex1.lst - generated by MGTEK Assembler ASM12 V1.26 Build 144 for WIN32 (x86) - Tue Aug 03 18:10:35 2010


    1:          =0000800            ORG $800
    2:     800 CC 983E            LDD #$983E      ;  load accumulator d with 16bit data  (D <= 983EH)
    3:     803 02                       INY                    ;  increase index register y (Y <= Y + 1)
    4:                                         END

Symbols:
********************************************************************************

########################s19 file#################################

S0030000FC
S1070800CC983E024C
S9030000FC

##############################################################

SIMHC12

Assume this simulator as CPU12 complete with memory space. You have to load the machine language file because CPU can only understand the machine code, not the assembly language or else.

1. Load your machine file (*.s19) to this simulator with choose File menu and click on Load. 

2. Observe that the machine language is already in the memory.

3. Set your PC to the location where your program is stored. In this case, your program is starting at address $800.

4. Use step to observe the result of the instruction step-by-step.

First 'step execute' means that the first instruction is executed. First instruction is LDD #$983E; the data $983E is loaded into double accumulator D. PC is pointed to the next instruction that is INY.

After click on 'step' again, we realise that the index register y increase to 1 from 0 value.

Wish you all the best.

Data Transfer and Manipulation Instructions

Here are the summary of Data Transfer and Manipulation Instructions.

There's a correction here. After execution of  the instruction SEX B,Y, B supposed to be $F8 (maintain) and Y are $FFF8.

There's a correction on the instruction movw 0,x,0,y. It supposed to be movb 0,x,0,y.

Instruction Sets of 6812

68HC12 has more than1000 instructions. They are grouped into a few functional categories as following :

1)    Data Transfer and Manipulation Instructions —instructions which move and manipulate data :

                                                      i.        Load and Store — load copy of memory contents into a register; store copy of register contents into memory.

                                                     ii.        Transfer —copy contents of one register to another.

                                                    iii.        Exchange— exchange contents of two registers.

                                                   iv.        Move — copy contents of one memory location to another.

2)    Arithmetic Instructions—addition, subtraction, multiplication, division

3)    Logic and Bit Instructions —perform logical operations

1)     

2)     

3)     

1)     

2)     

3)     

4)    Data test instructions — test contents of a register or memory (to see if zero, negative, etc.), or compare contents of a register to memory (to see if bigger than, etc.)

5)    Jump and Branch Instructions—Change flow of program (e.g., goto, if-then-else, switch-case)

6)    Function Call and Interrupt Instructions— initiate or terminate a subroutine; initiate or terminate and interrupt call

7)    Stacking Instructions — push data onto and pull data off of stack

8)    Stop and Wait Instructions — put HC12 into low power mode

9)    BCD arithmetic, fuzzy logic, minimum and maximum, multiply-accumulate, table interpolation

Addressing Modes of 6812

I already uploaded notes about Addressing Modes of 68HC12 via iLearn portal more than a week ago. The students can easily access the notes. However, why they still don't have this notes? It is really make me very upset. Everything is on fingertips today, just + internet access. Here, we don't have any problem to access to the internet today because of the networking is already improved and served better in term of speed especially. Thank's to USMB UiTM Dungun. I also uploaded all notes in Yahoo Group of ECE365. No problem to access today. When I remind back during my era around 1999 to 2003, there's no internet access provided as today, no e-learning system and no notes given by the lecturer. With my efforts, I asked the senior for the notes and photocopy everything belong to them. I got the notes before the semester began. See, the different environment of studying today and 5 years ago!

What I want to write here, is not a mumbling state as above. I want to share how do you wanna be a master in Addressing Modes of 6812? I give you some tips as following :

1. You should have my notes and Appendix A from iLearn or Yahoo Group (Class ECE365).
2. In your mind, you should remember the architecture of CPU Registers of 6812 and Memory. 
3. You should understand how to use Appendix A.
4. You should try to understand the Addressing Modes as below.

Table 1.0 Summary of Addressing Mode

From Table 1.0 above, you know how many types of addressing modes in 6812 and how to write a proper instruction. Do you know what the instruction all about? Easily refer to Appendix A and my hand notes.

INH
The execution is only inside the CPU.
Syntax : Instruction
eg. NOP ; no operation
      INX ; X <= X+1
      INY ; Y <=Y+1
      DECA; A <= A-1
      DECB; B <= B-1

IMM
To load immediate value with #
Syntax : Instruction #8-bit/16-bit data
eg. LDAA #35 ; A <=35
     LDAB #%10000101; B <=87H

DIR
To access memory $0000-$00FF
Syntax : Instruction 8-bit address
eg. LDAA $20; A <=($20)
      LDAB $3A ; B <= ($3A)

EXT
To access memory >$00FF
Syntax : Instruction 16-bit address
eg. LDAA $0105; A <= ($0105)
     LDAB $10FF ; B <= ($10FF)

IDX (5-bit constant offset => -16 to 15)  -2^5 to (2^5 -1)
Syntax : Instruction 5-bit signed offset, X/Y/SP/PC
eg. LDAB 15,Y ; B <= (Y+15)
     STAA -8,X ; (X-8) <=A

IDX1 (9-bit constant offset => -256 to 255) -2^8 to (2^8-1)
Syntax : Instruction 9-bit signed offset, X/Y/SP/PC

eg. LDAB 100,Y ; B <= (Y+100)

     STAA -200,X ; (X-200) <= A

IDX2 (16-bit constant offset => -32,758 to 32,757) -2^15 to (2^15-1)

Syntax : Instruction 16-bit signed offset, X/Y/SP/PC

eg. LDAB 1000,Y; B <= (Y+1000)

     STAA -2000,X ; (X-1000) <= A

[IDX2] 16-bit constant indirect=> -32,758 to 32,757) -2^15 to (2^15-1)
Syntax : Instruction 16-bit signed offset, X/Y/SP/PC

eg. LDAB [100,Y] ; B <= [Y+100]

     STAA [-20,X] ; [X-20] <= A

Accumulator Offset (IDX) => A, B & D
Syntax : Instruction A/B/D,X/Y/SP/PC
eg. LDAB A,Y ; B <= (A+Y)
     STAA B,X ; (B+X) <= A

Pre/Post-Increment/Decrement  (IDX) => 1 to 8
Syntax : Instruction 3bit,X/Y/SP

Pre Decrement
eg. LDAA 2,-SP ; A <= (SP-2), SP <= SP-2

Post-Decrement
eg. LDAA 2,SP- ; A <= (SP), SP <=SP-2

Pre-Increment
eg. LDAA, 2,+SP ; A <= (SP+2), SP <=SP+2

Post-Increment
eg. LDAA 2,SP+ ; A <= (SP), SP <= SP+2

REL and [D,IDX2] - discussed later when you understand the program loops and subroutines

CPU12 Registers and Memory organization

Before we proceed to learn about the 6812, what should you know is....

CPU Features :
16-bit Data Bus
16-bit Address Bus

Figure 1.0 The architecture of CPU12 and its memory organisation

****************  Following part is not included in CPU12 syllabus*************************

****************  Following part is not included in CPU12 syllabus*************************

This is computer architecture subject.

2-way set-associative cache memory

Firstly, you can choose how many way of set-associative mapping for instance, 2-way set-associative cache. If you have 16KB cache, it means that you have double size of main memory that is 32KB. If you select the 16-bit data bus width, it is equal to 2-byte lines of cache and if your cache memory is memory byte-addressable, thus you’ll get w=1 bit byte offset in line (2^W=2 byte lines of cache). Then, you’ll get 13-bit (L) set index in cache. If the memory address size is 32-bit, then you’ll get the 18-bit (Tag) line tag. Refer to the calculation and illustration below so that you can more understand.

32KB main memory = 2¹⁵ x 8 bits = 2ⁿ x 16 bits

2ⁿ = (2¹⁵ x 8) / 16 = 16 384 = 2¹⁴

16KB cache = 2¹⁴ x 8 bits = 2^L x 16 bits

2^L = (2¹⁴ x 8 bits) / 16 bits = 8192 = 2¹³